Evaluation of Asymmetric Multiprocessing for Zynq System-on-Modules TE0720-02-2IF, TE0720-02-1CF, TE0720-02-1QFwith Carrier Board TE0701-05

This application note describes the asymmetric multiprocessing design (AMP) based on the Xilinx application note XAPP1093. The AMP design is ported from ISE 14.5 design flow to the Xilinx Vivado 2015.2and SDK 2015.2design flow. The ARM Cortex A9 processor works together with the MicroBlaze processor, sharing the terminal and block ram. Both processors execute program from the same external DDR3 memory. The MicroBlaze processor is controlling 4 EdkDSP floating point accelerators. Each accelerator is organised as 8xSIMD reconfigurable data path, controlled by the PicoBlaze6 controller.

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