LL2 - Avionics


The introduction of multicore processor in embedded aircraft equipment/system is motivated by the following aspects:

  • Provide a long-term answer to the increasing demand of processing power for embedded hardware elements with an acceptable power consumption and weight;
  • Anticipate the mass market obsolescence for single-core aspects;
  • Capabilities enhancement in embedded aircraft equipment as combination of following factors:
    • Increased performance (Amdhal and Gustafson Law);
    • Increased integration (less equipment to realize the same functionality or the same amount of equipment to host different functionality;
    • Environmental Impact: less equipment, less power consumption, less dissipation, less weight, etc.

All the aspects connected with the requested certification level (DAL, Design Assurance Level), and “dressed” with a middleware layer comply with the SOA/DDS architecture, could give the avionics architecture something really needed with respect to several aspects concerning reliability and portability. In EMC² innovative criteria for establishing platform architectures will be identified, to ensure higher performances, lower weight and power consumption at low cost, while improving system safety and security combined with extensions for dynamic adaptive behavior. Moreover, requirements for systematically managing safety aspects and for addressing applications and platform certification will be explored.

Embedded Aircraft Systems are composed of Airborne Software installed on Hardware: both elements must fulfil the requirements for safety critical functionality on the aircraft. Thus, the design, development, certification and operation of the hardware/software have to meet Reliability, Availability, Maintainability and Safety (RAMS) objectives depending on their Design Assurance Level.
The use of multicore processors technology in safety-critical Airborne Software appears to be the preferred and undisputed choice for the future generation of Airborne Embedded Systems to satisfy processing performance requirements and weight reduction of digital electronic hardware. The expectation from the use of Multicore technology in Embedded Aircraft Equipment is a combination of increasing performance and increasing integration.

Work package structure

The goal of this Use Case is to identify/study, and evaluate/test the potential of multicore for mixed-critical application in a multi-domain avionics scenario. Main topics of interest are to explore the full potential of the multicore based on the needs and requirements of the next IMA generation for a really high dependable avionics system, especially for the UAS (unmanned aircraft systems).

In particular this UC will focus on:

  • Laboratory prototype of a “Multi Domain Avionic Architecture”, real-time, dependable avionics computers systems for interfacing with main avionic sensor (radar and electro-optics), including the interface with the health monitoring communication (with structural information) for maintenance/diagnostic purposes, the connection with the Open (External) World in order to be used as Multi Avionics Platform for all the airborne functionalities (from high performance to time-critical  (with safety or non-safety information).
  • Use of a multicore to share within the same “system of computer” avionic application from different typology: from “high performance sensing” to “flight control – safety critical”, including the interface with all the main avionic sensors where parallelise hard-real time functionalities: Partitioning, Communication and Mapping on a multicore processor (task decomposition, task parallelism and synchronization).
  • To evaluate system implication when there are several avionic applications within the same multicore processor: i.e. the synchronization from the different avionic application execute from different cores.

The objectives of this task are the creation of a combination of low and high criticality research platform that combines low and high-criticality tasks in a way that the user (pilot) is able to distinguish possible output. An example is a high and low resolution depiction of a 3D terrain system. Another goal is to find extensions to this experimental research platform that provides a flexible monitoring and execution framework for low criticality functions on the high-performance platform in a way that guarantees a minimum performance in all cases for multiple computing partitions and leverages the average performance boost for lower criticality tasks for increased response time or improved resolution of virtual reality. Limits of integrating high criticality tasks into the high-performance platform shall be evaluated.